MK2704STR集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

描述 Description

The MK2704 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our patented analog Phase-Locked Loop (PLL) techniques, the device uses a fundamental 27 MHz crystal or clock input to produce a buffered reference clock and a selectable audio clock. The audio clock is frequency locked to the 27 MHz clock, assuring that the audio with zero ppm error and video will always track perfectly.

特性 Features

• Packaged in 8 pin SOIC

• Uses an inexpensive fundamental crystal, or clock

• Output clocks of 16.9344 MHz, 18.432 MHz, and 36.864 MHz

• Supports 384x MPEG sampling rates of 44.1 kHz, 48 kHz and 96 kHz

• Patented zero ppm synthesis error in all clocks

• All frequencies are frequency locked

• Advanced, low power, sub-micron CMOS process

• 3.3 V or 5 V operating voltage