PLL Audio Clock Synthesizer

Description The MK2703 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our patented analog Phase-Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produce

文件：63.14 Kbytes 页数：4 Pages

ICST

PLL AUDIO CLOCK SYNTHESIZER

Description The MK2703 is a low-cost, low-jitter, high-performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using IDT’s patented analog Phase Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produ

文件：187.42 Kbytes 页数：7 Pages

IDT

PLL AUDIO CLOCK SYNTHESIZER

Features • Packaged in 8-pin SOIC • Pb (lead) free package • Uses an inexpensive, fundamental mode crystal or clock • Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48 kHz, and 96 kHz • Patented zero ppm synthesis error in all clocks • All frequencies are frequency locked • Advanced, lo

文件：348.43 Kbytes 页数：8 Pages

RENESAS

瑞萨

PLL AUDIO CLOCK SYNTHESIZER

Features • Packaged in 8-pin SOIC • Pb (lead) free package • Uses an inexpensive, fundamental mode crystal or clock • Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48 kHz, and 96 kHz • Patented zero ppm synthesis error in all clocks • All frequencies are frequency locked • Advanced, lo

文件：348.43 Kbytes 页数：8 Pages

RENESAS

瑞萨

PLL AUDIO CLOCK SYNTHESIZER

Description The MK2703 is a low-cost, low-jitter, high-performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using IDT’s patented analog Phase Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produ

文件：187.42 Kbytes 页数：7 Pages

IDT

PLL Audio Clock Synthesizer

Description The MK2703 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our patented analog Phase-Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produce

文件：63.14 Kbytes 页数：4 Pages

ICST

Package：8-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL AUD CLK SYNTHESIZER 8SOIC

Renesas Electronics America Inc

Package：8-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL AUD CLK SYNTHESIZER 8SOIC

Renesas Electronics America Inc

Package：8-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL AUD CLK SYNTHESIZER 8SOIC

Renesas Electronics America Inc