MK2703集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

描述 Description

The MK2703 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our patented analog Phase-Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produce a buffered reference clock and a selectable audio clock.

特性 Features

• Packaged in 8 pin SOIC

• Uses an inexpensive fundamental crystal, or clock

• Supports MPEG sampling rates of 32 kHz,

44.1 kHz, 48 kHz and 96 kHz

• Patented zero ppm synthesis error in all clocks

• All frequencies are frequency locked

• 25 mA output drive capability at TTL levels

• Advanced, low power, sub-micron CMOS process

• 3.3 V or 5 V operating voltage

• For audio clocks that require lower jitter, use the

MK2731-03C

• Industrial temperature version available