MK2302S-01ILFT集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

特性 Features

• 8-pin SOIC package

• Pb (lead) free package

• Low input to output skew of 250 ps max

• Absolute jitter ± 500 ps

• Propagation Delay ± 350 ps

• Ability to choose between different multipliers from 0.5X

to 16X

• Output clock frequency up to 168 MHz at 3.3 V

• Can recover degraded input clock duty cycle

• Output clock duty cycle of 45/55

• Full CMOS clock swings with 25mA drive capability at

TTL levels

• Advanced, low power CMOS process

• Operating voltage of 3.3 V or 5 V

• Industrial temperature version available