Spread Spectrum Multiplier Clock

Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and spread amounts (percentages), designed to generate high frequency clocks with low EMI. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts an inexpensive, fundamenta

文件：72.37 Kbytes 页数：5 Pages

ICST

SPREAD SPECTRUM MULTIPLIER CLOCK

Features • Packaged in 20-pin tiny SSOP • Pb (lead) free package • Operating voltage of 3.3 V or 5 V • Multiplier modes of x1, x2, x3, x4, x5, and x6 • Inexpensive 10 - 25 MHz crystal or clock input • OE pin tri-states the outputs for board testing • Power down pin stops the outputs low •

文件：379.33 Kbytes 页数：9 Pages

RENESAS

瑞萨

Spread Spectrum Multiplier Clock

Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and spread amounts (percentages), designed to generate high frequency clocks with low EMI. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts an inexpensive, fundamenta

文件：72.37 Kbytes 页数：5 Pages

ICST

SPREAD SPECTRUM MULTIPLIER CLOCK

Features • Packaged in 20-pin tiny SSOP • Pb (lead) free package • Operating voltage of 3.3 V or 5 V • Multiplier modes of x1, x2, x3, x4, x5, and x6 • Inexpensive 10 - 25 MHz crystal or clock input • OE pin tri-states the outputs for board testing • Power down pin stops the outputs low •

文件：379.33 Kbytes 页数：9 Pages

RENESAS

瑞萨

Spread Spectrum Multiplier Clock

Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and spread amounts (percentages), designed to generate high frequency clocks with low EMI. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts an inexpensive, fundamenta

文件：72.37 Kbytes 页数：5 Pages

ICST

Spread Spectrum Multiplier Clock

Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and spread amounts (percentages), designed to generate high frequency clocks with low EMI. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts an inexpensive, fundamenta

文件：72.37 Kbytes 页数：5 Pages

ICST