MK1704数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The MK1704A is an upgraded version of the MK1704 and is recommended for all new designs. It offers more reduction in the frequency amplitude peaks and will support frequencies up to 140 MHz. The MK1704A generates a low EMI output clock from a clock input. The part is designed to dither the LCD interface clock or other clocks for flat panel graphIDT controllers. The MK1704A uses IDT's proprietary mixture of analog and digital Phase Locked Loop (PLL) technology to synthesize the frequency. It also uses IDT's patented technique to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB.

特性 Features

8 pin SOIC package
Available in Pb (lead) free package
Provides a spread spectrum output clock
Supports leading flat panel controllers
Accepts a clock input, provides same frequency dithered output
Optimized for higher resolutions that require up to 140 MHz, as well as 40 MHz (SVGA) and 65 MHz (XVGA) clocks
Peak reduction by 7 dB - 14 dB typical on 3rd - 19th odd harmonIDT
Low EMI feature can be disabled
Operating voltage of 3.3V or 5V
Advanced, low power CMOS process
See the MK1714-01 for a multiplier with low EMI which can operate from a crystal