Frame Rate Communications PLL

The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to the 8 kHz backp 3.3 volt operation\nPackaged in 16-pin SOIC\nAvailable in Pb (lead) free package\nAccepts 8 kHz input clock\nOutput clock rates include T1, E1, T2, E2\nAvailable in commercial (0;

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丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

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瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：157401ASLF；Package：SOIC；FRAME RATE COMMUNICATIONS PLL

Features • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • For jitter attenuation, use the MK2049

文件：432 Kbytes 页数：12 Pages

RENESAS

瑞萨