MIMXRT685SFAWB数据手册恩XP中文资料规格书

描述 Description

The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio playback and voice userinterface applications combining a high-performance Cadence® Tensilica® HiFi 4 audio DSP corewith a next-generation Cortex-M33 core. The i.MX RT600 family of crossover MCUs is designed to unlock the potentialof voice-assisted end nodes with a secure, power-optimized embedded processor.
The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several high-bandwidth interfaces to access off-chipflash, including an Octal/Quad SPI interface with an on-the-fly decryption engine. In addition, the family offers arich set of peripherals, EdgeLock 400A security* and extremely low-power consumption with reduced power modesand fast wake-up times.
*A device that incorporates EdgeLock 400A security supports several on-chip security capabilities and is built on afoundation of secure boot, secure debug, and secure life cycle management designed to resist remote and localsoftware attacks.

特性 Features

Next-generation Cortex-M33 control processor core running at a frequency of up to300MHz
• Arm TrustZone for asset protection
• Cortex-M33 built-in Memory Protection Unit (MPU) supporting eight regions
• Two coprocessors for the Cortex-M33
• PowerQuad hardware accelerator for (fixed and floating point unit) DSP functions
• CASPER Crypto co-processor is provided to enable hardware acceleration for variousfunctions required for certain asymmetric cryptographic algorithms
Highly Optimized Cadence® Tensilica® HiFi 4 DSP processorcore, running at frequencies of up to 600 MHz
• Hardware Floating Point Unit. Up to four single-precision IEEE floating point MACs per cycle
On-chip memory
• Up to 4.5 MB of system SRAM accessible by both CPUs and all DMA engines
• 128 KB of local, Tightly Coupled Memory dedicated to the DSP CPU
• 96 KB of I & D cache for DSP accesses to shared system SRAM
Security features
• Secure Isolation
• Secure execution environment through Arm® TrustZone® technologyfor ARMv8-M
• Symmetric key isolation through hardware engines
• Secure Boot
• Secure boot support implemented in boot ROM, providing immutable root of trust
• Secure Storage
• Physically Unclonable Function (PUF) based key store
• On-the-fly-AES decryption (OTFAD) of off-chip flash for code storage
• Secure Debug
• Certificate-based debug authentication mechanism
• Secure Update
• Supports firmware update with authenticity (RSA signed) and confidentiality (AES-CTRencrypted) protection
• Hardware Cryptography Accelerators
• Symmetric cryptography (AES) with 256-bit key strength
• Asymmetric cryptography acceleration
• TRNG with 256-bit entropy
• Hash engine with SHA-256 and SHA-1
• Secure Identity
• 128-bit Universal Unique Identifier (UUID) and 256-bit Compound Device Identifier (CDI)
Digital peripherals
• Two DMA engines, each with 32 channels
• Octal/Quad SPI Flash with a dynamic description
• Two SD/eMMC memory card interfaces. One supports eMMC 5.0 with HS400/DDR operation
• USB high-speed host/device controller with on-chip PHY
• Up to eight configurable universal serial interface modules (Flexcomm Interfaces). Configurableas SPI/I2C/I2S/UART
• One high-speed SPI interface supporting 50 MHz operation
• One I3C bus interface
• A digital microphone interface supporting up to 8 channels

应用 Application

Automotive
•Heating Ventilation, and Air Conditioning (HVAC)
•Motorcycle Engine Control Unit (ECU) and Small Engine Control
Industrial
•Air Conditioning (AC)
•Heat Metering
•Smart Power Socket and Light Switch
Mobile
•Hearables
•Input Device (Mouse, Pen, Keyboard)
•Smart Watch
•Wireless Charging Pad
•Wristband
Smart City
•Automatic Vehicle Identification
•Transport Ticketing
Smart Home

• Audio Subsystems
•Home Security & Surveillance
•In-Home Energy Display
•Major Home Appliances
•Robotic Appliance
•Small and Medium Appliances
•Smart Speaker
Technologies

• Voice Recognition Consumer Electronics

• Voice-enabled IoT Devices