2A Sequencing LDO with Tracking and Ramp Control

文件：655.25 Kbytes 页数：15 Pages

MICREL

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2A Peak FPGA/CPLD LDO with POR, Ramp Control, and Sequencing

The MIC68200 is a high peak-current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start up current with lower nominal operating current. The MIC68200 can also implement a variety of power-up and power-down protocols such as sequenci • Stable with 4.7µF ceramic capacitor \n• Input voltage range: 1.65V to 5.5V \n• ±1.0% initial output tolerance \n• 2A maximum output current - peak start up \n• 1A continuous operating current \n• Tracking on turn-on and turn-off with pin strapping \n• Timing controlled sequencing on/off \n• Pr;

Microchip

微芯科技

2A Sequencing LDO with Tracking and Ramp Control

文件：619.21 Kbytes 页数：16 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：619.21 Kbytes 页数：16 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：655.25 Kbytes 页数：15 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：655.25 Kbytes 页数：15 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：619.21 Kbytes 页数：16 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：655.25 Kbytes 页数：15 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：619.21 Kbytes 页数：16 Pages

MICREL

麦瑞半导体

2A Sequencing LDO with Tracking and Ramp Control

文件：619.21 Kbytes 页数：16 Pages

MICREL

麦瑞半导体