MIC5162集成电路（IC）的特殊用途稳压器规格书PDF中文资料

General Description

The MIC5162 is a dual regulator controller designed for highspeed bus termination. It offers a simple, low-cost JEDEC compliant solution for terminating high-speed, low-voltage digital buses (i.e. DDR, SCSI, GTL, SSTL, HSTL, LV-TTL, Rambus, LV-PECL, LV-ECL, etc).

The MIC5162 controls two external N-Channel MOSFETs to form two separate regulators. It operates by switching between either the high-side MOSFET or the low-side MOSFET depending on whether the current is being sourced to the load or sinked by the regulator.

特性 Features

• JEDEC Compliant Bus Termination for SCSI, GTL, SSTL, HSTL, LV-TTL, Rambus, LV-PECL, LV-ECL, etc.

• DDR memory termination

• Tracking programmable output

• Requires minimal external components

• Wide bandwidth

• Input voltage range: 1.35V to 6V

• Logic controlled enable input

• Tiny MSOP-10 package

• Available –40°C

Applications

• Desktop computers

• Notebook computers

• Communication systems

• Video cards