MH8S64BBKG-10L数据手册MinebeaMitsumi中文资料规格书

描述 Description

DESCRIPTION
The MH8S64BBKG is 8388608 - word by 64-bit Synchronous DRAM module. This consists of eight industry standard 4Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.
The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required. This is a socket type - memory modules, suitable for easy interchange or addition of modules.FEATURES
Utilizes industry standard 4M x 16 Synchronous DRAMs TSOP and industry standard EEPROM in TSSOP
144-pin (72-pin dual in-line package)
Clock frequency 100MHz(max.)
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising edge
Burst length- 1/2/4/8/Full Page(programmable)
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
Auto precharge / All bank precharge controlled by A10
Burst type- sequential / interleave(programmable)
Column access - random
LVTTL Interface
Auto refresh and Self refresh
4096 refresh cycle /64msAPPLICATION
main memory or graphic memory in computer systems

特性 Features

Utilizes industry standard 4M x 16 Synchronous DRAMs TSOP and industry standard EEPROM in TSSOP
144-pin (72-pin dual in-line package)
Clock frequency 100MHz(max.)
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising edge
Burst length- 1/2/4/8/Full Page(programmable)
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
Auto precharge / All bank precharge controlled by A10
Burst type- sequential / interleave(programmable)
Column access - random
LVTTL Interface
Auto refresh and Self refresh
4096 refresh cycle /64msAPPLICATION
main memory or graphic memory in computer systems