MH8S64AQFC-7L中文资料536,870,912-BIT (8,388,608 - WORD BY 64-BIT)SynchronousDRAM数据手册MITSUBISHI规格书

描述 Description

DESCRIPTION
The MH8S64AQFC is 8388608 - word by 64-bit Synchronous DRAM module. This consists of four industry standard 8Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.
The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.
This is a socket type - memory modules, suitable for easy interchange or addition of modules.
• Utilizes industry standard 8M x 16 Sy nchronous DRAMs
   TSOP and industry standard EEPROM in TSSOP
• 144-pin (72-pin dual in-line package)
• single 3.3V±0.3V power supply
• Max. Clock frequency -6:133MHz,-7,8:100MHz
• Fully synchronous operation referenced to clock rising edge
• 4 bank operation controlled by BA0,1(Bank Address)
• /CAS latency- 2/3(programmable)
• Burst length- 1/2/4/8/Full Page(programmable)
• Burst type- sequential / interleave(programmable)
• Column access - random
• Auto precharge / All bank precharge controlled by A10
• Auto refresh and Self refresh
• 4096 refresh cycle /64ms
• LVTTL InterfaceAPPLICATION
   main memory or graphic memory in computer systems