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MH16D64AKQC-10中文资料三菱电机数据手册PDF规格书
MH16D64AKQC-10规格书详情
DESCRIPTION
The MH16D64AKQC is 16777216 - word x 64-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.
This consists of 8 industry standard 8M x 16 DDR Sy nchronous DRAMs in TSOP with SSTL_2 interf ace which achiev es v ery high speed data rate up to 133MHz.
This socket-ty pe memory module is suitable f or main memory in computer systems and easy to interchange or add modules.
FEATURES
- Utilizes industry standard 8M X 16 DDR Synchronous DRAMs in TSOP package , industry standard EEPROM(SPD) in TSSOP package
- Vdd=Vddq=2.5v ±0.2V
- Double data rate architecture; two data transf ers per clock cycle
- Bidirectional, data strobe (DQS) is transmitted/receiv ed with data
- Differential clock inputs (CLK and /CLK)
- data and data mask referenced to both edges of DQS
- /CAS latency - 2.0/2.5 (programmable)
- Burst length- 2/4/8 (programmable)
- Auto precharge / All bank precharge controlled by A10
- 4096 ref resh cycles /64ms
- Auto ref resh and Self ref resh
- Row address A0-11 / Column address A0-8
- SSTL_2 Interface
- Module 2bank Configration
- Burst Type - sequential/interleave(programmable)
- Commands entered on each positive CLK edge
APPLICATION
Main memoryunit for Note PC, Mobile etc.
产品属性
- 型号：
MH16D64AKQC-10
- 制造商：
MITSUBISHI
- 制造商全称：
Mitsubishi Electric Semiconductor
- 功能描述：
1,073,741,824-BIT(16,777,216-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module
