MDB1900ZB中文资料Zero Delay Buffers Products数据手册Microchip规格书

描述 Description

The MDB1900ZB is a true zero delay buffer with fully integrated high-performance, low-power, and low phase noise programmable PLL.The MDB1900ZB is capable of distributing the reference clocks for PCIe (Gen1/Gen2/Gen3), SATA, ESI, SAS, SMI, and Intel® Quickpath Interconnect (QPI). The MDB1900ZB works in conjunction with a CK410B+, CK509B, or CK420BQ clock synthesizer to provide reference clocks to multiple agents.The MDB1900ZB is designed for Intel’s DB1900Z specification. The Intel part designation for the MDB1900ZB is identified as G20746-002.

特性 Features

·Supports zero delay (0ps) buffer mode for 100MHz and 133MHz clock frequencies.
·External feedback path for true zero delay operations
·Zero delay (PLL) mode can filter jitter in incoming clock
·Selectable PLL bandwidth for PLL mode
·Supports fanout buffer mode for clock frequencies between 0MHz and 250MHz
·Differential input reference with HCSL logic (0V ~ 0.7V)
·Nineteen differential HCSL-compatible clock output pairs
·Eight dedicated OE# pins to control their assigned output. Glitch free assertion/de-assertion.
·Spread spectrum modulation tolerant for EMI reduction
·SMBus interface for controlling output properties (enable/disable and delay tuning)
·Disabled outputs in power-down mode for maximum power savings
·Nine selectable SMBus addresses so multiple devices can share the same SMBus
·3.3V or 2.5V operation
·Commercial temperature range (0°C to +70°C)
·72-pin 10mm × 10mm QFN package
·GREEN, RoHS, and PFOS compliant

简介

MDB1900ZB属于集成电路（IC）的应用特定时钟/定时。由制造生产的MDB1900ZB应用特定时钟/定时专用时钟和计时 IC（集成电路）产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作，适合的设计环境较特定，例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。