MCXA145VPJ中文资料数据手册PDF规格书

特性 Features

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x) with 396 CoreMark

(4.12 CoreMark/MHz)

• Up to 1MB Flash, 128KB SRAM, up to 8 KB SRAM with ECC

• All RAM can be retained down to Deep Power Down mode

• -40 °C to 125 °C temperature range

• Down to 64 μA/MHz Active current, 32.26 μA Deep Sleep current, 8.2

μA Power Down current, 412 nA Deep Power Down current

Core

• Arm 32-bit Cortex-M33 CPU, with FPU and DSP extension instruction set, no TrustZone, no MPU

Memories

• Single-bank Flash: Up to 1024 KB Flash with ECC (support one bit correction and two bits detection)

• Cache Engine with 4 KB RAM

• Up to 128 KB RAM, configurable as up to 8KB RAM with ECC (support one bit correction and two bits detection)

• All RAM can be retained down to Deep Power Down mode

• 16 KB ROM

Security

• 128-bit Universal Unique Identifier (UUID) per device in accordance with IETF's RFC4122 version5 specification

• Device lifecycle management

• Flash read/write/execute permission protect by MBC and lockable

• Implicit-protected Flash Region (IFR)

• Security Monitoring:

— Code Watchdog for code flow integrity checking

— GLIKEY enhances protection against attacks to gain unauthorized access to sensitive registers

Low-Power Performance

• Active

— 64 μA/MHz in Active Mode (executing while(1) from flash, 3.3 V@25 °C)

• Deep Sleep

— 32.26 μA, 7.1 μs wake-up (3.3 V@25 °C)

• Power Down

— 8.2 μA, 16.6 μs wake-up (RAM X0/X1 and RAM A0 retained, 3.3 V@25 °C