MCP251863T-HSLASHSS中文资料微芯科技数据手册PDF规格书

General Features

• External CAN FD Controller with Integrated CAN

FD Transceiver and Serial Peripheral Interface

(SPI)

• Arbitration Bit Rate Up to 1 Mbps

• Data Bit Rate up to 5 Mbps

• CAN FD Controller Modes

- Mixed CAN 2.0B and CAN FD Mode

- CAN 2.0B Mode

• Fully ISO 11898-1:2015, ISO 11898-2: 2016 and

SAE J2962-2 Compliant

• Temperature Ranges:

- Extended (E): -40°C to +125°C

- High (H): -40°C to +150°C

• ISO 26262 Functional Safety Ready

• Low Electromagnetic Emission (EME) and High

Electromagnetic Immunity (EMI)

• AEC-Q100 and AEC-Q006 Qualified

• Package: SSOP28 (Moisture Sensitivity Level 2)

CAN FD Controller Features

Message FIFOs

• 31 FIFOs, Configurable as Transmit or Receive

FIFOs

• One Transmit Queue (TXQ)

• Transmit Event FIFO (TEF) with 32-bit Time

Stamp

Message Transmission

• Message Transmission Prioritization:

- Based on Priority Bit Field

- Message with Lowest ID gets Transmitted

First Using the Transmit Queue (TXQ)

• Programmable Automatic Retransmission

Attempts: Unlimited, 3 Attempts or Disabled

Message Reception

• 32 Flexible Filter and Mask Objects

• Each Object Can Be Configured to Filter Either:

- Standard ID + first 18 data bits, or

- Extended ID

• 32-bit Time Stamp

Special Features

• VDD: 2.7V to 5.5V

• Active Current: Maximum 20 mA at 5.5 V

40 MHz CAN clock

• Sleep Current: 15 A, Typical

• Low Power Mode Current: Maximum 10 A from

-40°C to +150°C

• Message Objects are Located in RAM: 2 KB

• Up to 3 Configurable Interrupt Pins

• Bus Health Diagnostics and Error Counters

• Transceiver Standby Control

• Start of Frame Pin for Indicating the Beginning of

Messages on the Bus

Oscillator Options

• 40, 20 or 4 MHz Crystal or Ceramic Resonator;

External Clock Input

• Clock Output with Prescaler

SPI Interface

• Up to 20 MHz SPI Clock Speed

• Supports SPI Modes 0,0 and 1,1

• Registers and Bit Fields are Arranged in a Way to

Enable Efficient Access through SPI

Safety Critical Systems

• SPI Commands with CRC to Detect Noise on SPI

Interface

• Error Correction Code (ECC) Protected RAM

Additional Features

• GPIO Pins: INT0 and INT1 Can Be Configured as

General Purpose I/O

• Open Drain Outputs: TXCAN, INT, INT0, and INT1

Pins Can Be Configured as Push/Pull or Open

Drain Outputs

CAN FD Transceiver Features

• Differential Receiver with Wide Common Mode

Range

• Remote Wake-Up Capability via CAN Bus -

Wake-Up on Pattern (WUP), as Specified in

ISO 11898-2: 2016, 3.8 μs Activity Filter Time

• Functional Behavior Predictable under All Supply

Conditions

• Transceiver Disengages from the Bus When Not

Powered Up

• RXD Recessive Clamping Detection

• High Electrostatic Discharge (ESD) Handling

Capability on the Bus Pins

• Bus Pins Protected Against Transients in

Automotive Environments

• Transmit Data (TXD) Dominant Time-Out

Function

• Undervoltage Detection on VCC and VIO Pins

• CANH/CANL Short-Circuit and Overtemperature

Protected

• Low Max Standby Current of 12 A

• Fulfills the OEM “Hardware Requirements for LIN,

CAN and FlexRay Interfaces in Automotive

Applications, Rev. 1.3”