INTEGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC

FEATURES RISC M•CORE MCU • 32-bit load/store RISC architecture • Fixed 16-bit instruction length • 16-entry 32-bit general-purpose register file • 32-bit internal address and data buses • Efficient four-stage, fully interlocked execution pipeline • Single-cycle execution for most instructio

文件：1.27961 Mbytes 页数：76 Pages

恩XP

INTEGRATED CELLULAR BASEBAND PROCESSOR

FEATURES RISC M¥CORE MCU ¥ 32-bit load/store RISC architecture ¥ Fixed 16-bit instruction length ¥ 16-entry 32-bit general-purpose register file ¥ 32-bit internal address and data buses ¥ Efficient four-stage, fully interlocked execution pipeline ¥ Single-cycle execution for most instructio

文件：1.13755 Mbytes 页数：76 Pages

恩XP

MICROCHIP/微芯
TO-92-3

MICROCHIP/微芯

上传：深圳市明嘉莱科技有限公司

MICROCHIP
SMT

Microchip

微芯科技

上传：深圳市凌锐智能科技有限公司

MICROCHIP/微芯
SOT-23-3

MICROCHIP/微芯

上传：深圳市明嘉莱科技有限公司