MCM69Q536TQ10中文资料摩托罗拉数据手册PDF规格书

32K x 36 Bit Synchronous Separate I/O SRAM

The Motorola MCM69Q536 is a 1 Megabit static random access memory, organized as 32K words of 36 bits. It features separate data input and data output buffers and incorporates input and output registers on board with high speed SRAM.

• Single 3.3 V ± 5 Power Supply

• Fast Access Times: 6/8/10 ns Max

• Sustained Throughput of 2.98 Gigabits/Second

• Single Clock Operation

• Address, Data Input, E1, E2, PT, W, and Data Output Registers on Chip

• 83 MHz Maximum Clock Cycle Time

• Self Timed Write

• Separate Data Input and Data Output Pins

• Pass–Through Feature

• Asynchronous Output Enable (G)

• LVTTL Compatible I/O

• No Dead Cycles Required for Reads after Writes or for Writes after Reads

• 176 Pin TQFP Package

• Simultaneous Reads and Writes