MCM63P819K数据手册恩XP中文资料规格书

描述 Description

Overview The MCM63P737K and MCM63P819K are 4M–bit synchronous fast static RAMs designed to provide a burstable, high performance, secondary cache. The MCM63P737K (organized as 128K words by 36 bits) and the MCM63P819K (organized as 256K words by 18 bits) integrate input registers, an output register, a 2–bit address counter, and high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design al-lows precise cycle control with the use of an external clock (K).

特性 Features

2.5 V / 3.3 V I/O pipelined.Replaces MCM69P819.