MCM56824AFN25AZP25中文资料摩托罗拉数据手册PDF规格书

DSPRAM 8K x 24 Bit Fast Static RAM

The MCM56824A is a 196,608 bit static random access memory organized as 8,192 words of 24 bits. The device integrates an 8K x 24 SRAM core with multiple chip enable inputs, output enable, and an externally controlled single address pin multiplexer. These functions allow for direct connection to the Motorola DSP56001 Digital Signal Processor and provide a very efficient means for implementation of a reduced parts count system requiring no additional interface logic.

Multiple power and ground pins have been utilized to minimize effects induced by output noise.

The MCM56824A is available in a 52 pin plastic leaded chip–carrier (PLCC) and a 9 x 10 grid, 86 bump surface mount PBGA.

• Single 5 V ± 10 Power Supply

• Fast Access and Cycle Times: 20/25/35 ns Max

• Fully Static Read and Write Operations

• Equal Address and Chip Enable Access Times

• Single Bit On–Chip Address Multiplexer

• Active High and Active Low Chip Enable Inputs

• Output Enable Controlled Three State Outputs

• High Board Density PLCC Package

• Low Power Standby Mode

• Fully TTL Compatible