i.MX50 32-bit MPU, ARM Cortex-A8 core, 800MHz, MAPBGA 400

The i.MX508 processor is the first system-on-chip (SoC) designed specifically for eReaders that incorporates a high performance 800MHz Arm® Cortex®-A8 processor and an integrated hardware Electronic Paper Display (EPD) Controller certified by E Ink® to drive the latest and next generation Pearl™ pan CPU Complex\n• Up to 800 MHz Arm® Cortex®-A8\n• 32 KB instruction and data caches\n• Unified 256 KB L2 cache\n• NEON™ SIMD media accelerator\n• Vector floating point coprocessor\nMultimedia\n• OpenVG™ 1.1 hardware accelerator\n• 32-bit primary display support up to SXGA+ resolution\n• EPD Controller;

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恩智浦

i.MX50 32-bit MPU, ARM Cortex-A8 core, 800MHz, POPBGA 416

The i.MX508 processor is the first system-on-chip (SoC) designed specifically for eReaders that incorporates a high performance 800MHz Arm® Cortex®-A8 processor and an integrated hardware Electronic Paper Display (EPD) Controller certified by E Ink® to drive the latest and next generation Pearl™ pan CPU Complex\n• 32 KB instruction and data caches\n• NEON™ SIMD media accelerator\n• OpenVG™ 1.1 hardware accelerator\n• EPD Controller supporting up to 4096 x 4096\n• Enhanced Pixel Processing Pipeline (PxP) supporting CSC, Combine, Rotate, Gamma Mapping\n• Up to 2 GB LP-DDR2, DDR2 and LP-DDR1(mDDR);

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恩智浦