MCF53014CMJ240J中文资料飞思卡尔数据手册PDF规格书

Features

• Version 3 ColdFire® core with EMAC

• Up to 211 Dhrystone 2.1 MIPS @ 240 MHz

• 16 KBytes unified instruction/data cache

• 128 KBytes internal SRAM with standby power supply support

• Crossbar switch technology (XBS) for concurrent access to peripherals or RAM from multiple bus masters

• Enhanced Secure Digital Host Controller (eSDHC)

– Supports CE-ATA, SD Memory, miniSD Memory, SDIO, miniSDIO, SD Combo, MMC, MMC plus, MMC 4x, and MMC RS cards

• Two ISO7816 smart card interfaces

• IC identification module

• Voice-band audio codec with integrated speaker, microphone, headphone, and handset amplifiers

• 16- or 32-bit SDR, 16-bit DDR/mobile-DDR SDRAM controller

• USB 2.0 On-the-Go controller

• USB host controller

• 2 10/100 Ethernet MACs

• Coprocessor for acceleration of the DES, 3DES, AES, MD5, and SHA-1 algorithms

• Random number generator

• 16-channel DMA controller

• Synchronous serial interface

• 4 periodic interrupt timers

• 4 32-bit timers with DMA support

• Real-time clock (RTC) module with standby support

• DMA-supported serial peripheral interface (DSPI)

• 3 UARTs

• I2C bus interface