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MC9S12T64CPK16中文资料恩XP数据手册PDF规格书

MC9S12T64CPK16
厂商型号

MC9S12T64CPK16

功能描述

composed of standard on-chip peripherals including a 16-bit central

文件大小

7.26133 Mbytes

页面数量

608

生产厂商 未知制造商
企业简称

恩XP

中文名称

未知制造商

数据手册

下载地址一下载地址二

更新时间

2025-7-2 11:10:00

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MC9S12T64CPK16价格和库存,欢迎联系客服免费人工找货

MC9S12T64CPK16规格书详情

• HCS12 Core

– 16-bit HCS12 CPU

i. Upward compatible with M68HC11 instruction set

ii. Interrupt stacking and programmer’s model identical to

M68HC11

iii. 20-bit ALU

iv. Instruction queue

v. Enhanced indexed addressing

– MEBI (Multiplexed External Bus Interface) 1

– MMC (Module Mapping Control)

– INT (Interrupt control)

– BKP (Breakpoints)

– FBDM (Fast Background Debug Mode)

i. Synchronous Serial Peripheral Interface (SPI mode) to

allow fast read and write of internal memory contents.

ii. 4M bit per second in SPI mode at 16MHz bus

iii. Single Wire Interface

• CRG (low current oscillator, PLL, reset, clocks, COP watchdog,

real time interrupt, clock monitor)

• LVD (Low Voltage Detector)

– Low Voltage Detector to pull reset when the VDDR Supply

Voltage falls to LVD trip voltage.

• 64K byte Flash EEPROM 2

– Two 32K byte Flash EEPROM blocks independently

programmable and erasable

– Programmable during calibration

• 2K byte RAM

– Single cycle misaligned 16-bit access

• 2K byte CALRAM (Calibration RAM)

– 2K byte calibration block over Flash EEPROM

– Access cycle compatible to Flash EEPROM

• 8 channel Analog-to-Digital Converters

– 10-bit resolution

– External conversion trigger

• Enhanced Capture Timer

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels

– Two 8-bit or one 16-bit pulse accumulators

• 8 PWM channels

– Programmable period and duty cycle

– 8-bit 8-channel or 16-bit 4-channel

– Separate control for each pulse width and duty cycle

– Center-aligned or left-aligned outputs

– Programmable clock select logic with a wide range of

frequencies

– Fast emergency shutdown input

– Usable as interrupt inputs

• Serial interfaces

– Two asynchronous Serial Communications Interfaces (SCI)

– One synchronous Serial Peripheral Interface (SPI)

• Operating Condition

– 32 MHz CPU equivalent to 16MHz bus operation

– 2.25 to 2.75V Digital Supply Voltage generated using an

internal voltage regulator

– 4.75V to 5.25V Analog and I/O Supply Voltage

– 80-Pin LQFP

Technology: 0.25 micron CMOS

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