MC9S12K中文资料恩XP数据手册PDF规格书

Features

• 16-bit CPU12

— Upward compatible with M68HC11 instruction set

— Interrupt stacking and programmer’s model identical to M68HC11

— Instruction queue

— Enhanced indexed addressing

• System Integration Module (SIM)

— Multiplexed External Bus Interface (MEBI)

• Single chip or expanded

• 16 address/16 data wide or 16 address/8 data narrow modes

— Memory Map and Interface (MMC)

— Interrupt Controller (INT)

— Development support

• Single-wire Background Debug Mode™ (BDM)

• Debugger with on-chip trace buffer and flexible triggers (DBG)

• On-chip hardware Breakpoints (BKP)

• Oscillator (OSC)

— 2Mhz to 16Mhz frequency range

— Pierce with amplitude loop control

— Clock monitor

• Clock and Reset Generator (CRG)

— Phase-locked loop clock frequency multiplier

— Self Clock mode in absence of external clock

— COP watchdog

— Real Time interrupt (RTI)

• Memory options

— 32K, 64K, 128K, 256K Byte Flash EEPROM

• Internal program/erase voltage generation

• Security and Block Protect bits

• Built-in Error Checking and Correction code (ECC)

— 1K, 2K, 4K Byte EEPROM

— 2K, 4K, 8K, 12K Byte static RAM

• Analog-to-Digital Converter(s) (ADC)

— Two 8-channel modules with 10-bit resolution for MC9S12KT256

— One 16-channel module with 10-bit resolution for MC9S12KG128, MC9S12K64 and MC9S12K32

— External conversion trigger capability

• 8-channel Timer (TIM)

— Programmable input capture or output compare channels

— Simple PWM mode

— Counter Modulo Reset

— External Event Counting

— Gated Time Accumulation

• 8-channel Pulse Width Modulator (PWM)

— Programmable period and duty cycle per channel

— 8-bit 8-channel or 16-bit 4-channel

— Edge and center aligned PWM signals

— Emergency shutdown input

• Up to three 1M bit per second, CAN 2.0 A, B software compatible modules

— Five receive and three transmit buffers

— Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

— Four separate interrupt channels for Rx, Tx, error and wake-up

— Low-pass filter wake-up function

— Loop-back for self test operation

• Serial interfaces

— Up to two asynchronous serial communication interface (SCI)

— Up to three synchronous serial peripheral interface (SPI)

— Inter-IC Bus (IIC)

• Internal 2.5V Regulator

— Input voltage range from 3.15V to 5.5V

— Low power mode capability

— Low Voltage Reset (LVR) and Low Voltage Interrupt (LVI)

• 20 key wake up inputs

— Rising or falling edge triggered interrupt capability

— Digital filter to prevent short pulses from triggering interrupts

— Programmable pull ups and pull downs

• Operating frequency for ambient temperatures (TA -40°C to 125°C)

— 50MHz equivalent to 25MHz Bus Speed

• 112-Pin LQFP or 80-Pin QFP package

— I/O lines with 3.3V/5V input and drive capability

— 3.3V/5V A/D converter inputs