MCU Block Diagram

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freescaleFreescale Semiconductor, Inc

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MC9RS08KA8 Features

文件：2.47766 Mbytes 页数：190 Pages

freescaleFreescale Semiconductor, Inc

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RS08KA 8-bit MCU, RS08 core, 8KB Flash, 20MHz, DIP 20

RS08KA microcontrollers (MCUs) are general-purpose 8-bit devices for the ultra-low-end market. Featuring RS08 architecture, RS08KA devices are specifically crafted to be more efficient and cost effective for small memory size microcontrollers. The MC9RS08KA MCU is a general-purpose device that can b 8-bit RS08 Central Processor Unit (CPU)• Up to 10 MHz (bus frequency) RS08 CPU at 1.8 volts for 100 ns minimum instruction time\n• Subset of HC08 instruction set with added BGND instruction\n• Supports tiny/short address mode\n• Index addressing scheme through memory mapped registers X and D[X] with;

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RS08KA microcontrollers (MCUs) are general-purpose 8-bit devices for the ultra-low-end market. Featuring RS08 architecture, RS08KA devices are specifically crafted to be more efficient and cost effective for small memory size microcontrollers. The MC9RS08KA MCU is a general-purpose device that can b 8-bit RS08 Central Processor Unit (CPU)• Up to 10 MHz (bus frequency) RS08 CPU at 1.8 volts for 100 ns minimum instruction time\n• Subset of HC08 instruction set with added BGND instruction\n• Supports tiny/short address mode\n• Index addressing scheme through memory mapped registers X and D[X] with;

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RS08KA 8-bit MCU, RS08 core, 8KB Flash, 20MHz, SOIC 16

RS08KA microcontrollers (MCUs) are general-purpose 8-bit devices for the ultra-low-end market. Featuring RS08 architecture, RS08KA devices are specifically crafted to be more efficient and cost effective for small memory size microcontrollers. The MC9RS08KA MCU is a general-purpose device that can b 8-bit RS08 Central Processor Unit (CPU)• Up to 10 MHz (bus frequency) RS08 CPU at 1.8 volts for 100 ns minimum instruction time\n• Subset of HC08 instruction set with added BGND instruction\n• Supports tiny/short address mode\n• Index addressing scheme through memory mapped registers X and D[X] with;

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