32-Bit Power Architecture SoC, 2 X 1250MHz, DDR1/2, AltiVec, GbE, PCI-e, SRIO, -40 to 105C, Rev 3

NXP’s MPC8640D dual-core processor is engineered to deliver breakthrough performance, connectivity and integration for embedded networking, telecom, aerospace and defense, storage, industrial and pervasive computing applications.\nThe MPC8640D’s strength is its integration of the high-performance e6 • CPU speeds - 1 GHz/1.25 GHz\n• Typical power - 14 watts/21 watts\n• MPX bus (integrated) - Up to 500 Mhz\n• L1 cache (integrated) - 32 KB instruction, 32 KB data per core with parity protection\n• L2 cache (integrated) - 1 MB per core with optional ECC\n• The MPC8640D is included in NXP’s product ;

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Integrated Host Processor Hardware Specifications Addendum for the MC8640xTxxyyyyaC Series

文件：446.58 Kbytes 页数：8 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

Integrated Host Processor Hardware Specifications

文件：1.6977 Mbytes 页数：140 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

Integrated Host Processor Hardware Specifications Addendum for the MC8640xTxxyyyyaC Series

文件：446.58 Kbytes 页数：8 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

Integrated Host Processor Hardware Specifications

文件：1.6977 Mbytes 页数：140 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

Integrated Host Processor Hardware Specifications Addendum for the MC8640xTxxyyyyaC Series

文件：446.58 Kbytes 页数：8 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体