MC74LVX4245数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The 74LVX4245 is a 24-pin dual-supply, octal translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V/5V supply environment such as laptop computers using a 3.3V CPU and 5V LCD display. The A port interfaces with the 5V bus; the B port interfaces with the 3V bus. The Transmit/Receive (T/Rbar) input determines the direction of data flow. Transmit (active-High) enables data from the A port to the B port. Receive (active-Low) enables data from the B port to the A port. The Output Enable (OEbar) input, when High, disables both A and B ports by placing them in 3-State.

特性 Features

• Bi-directional Interface Between 5V and 3V Buses
• Control Inputs Compatible with TTL Level
• 5V Data Flow at A Port and 3V Data Flow at B Port
• Outputs Source/Sink 24mA at 5V Bus and 12mA at 3V Bus
• Guaranteed Simultaneous Switching Noise Level and Dynamic Threshold Performance
• Available in SOIC and TSSOP Packages
• Functionally Compatible with the 74 Series 245
• Pb-Free Packages are Available*

简介

MC74LVX4245属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的MC74LVX4245缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。