MC68HCL05J1A中文资料飞思卡尔数据手册PDF规格书

Introduction

The MC68HC05J1A is a member of the low-cost, high-performance M68HC05 Family of 8-bit microcontroller units (MCU). The M68HC05 Family is based on the customer-specified integrated circuit (CSIC) design strategy. All MCUs in the family use the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types.

On-chip memory of the MC68HC05J1A includes:

• 1240 bytes of user read-only memory (ROM)

• 64 bytes of user random-access memory (RAM)

Features

Features of the MCU include:

• Popular M68HC05 CPU

• Memory-mapped input/output (I/O) registers

• 1240 bytes of user ROM including eight user vector locations

• 64 bytes of user RAM

• 14 bidirectional I/O pins with these features:

– Software programmable pulldown devices

– Four I/O pins with 8-mA current sinking capability

– Four I/O pins with maskable external interrupt capability

• Hardware mask and flag for external interrupts

• Fully static operation with no minimum clock speed

• On-chip oscillator with connections for a crystal or ceramic resonator or for a resistor-capacitor (RC) network

• 15-bit multifunction timer

• Computer operating properly (COP) watchdog

• Power-saving stop (or halt), wait, and data-retention modes

• Illegal address reset

• Internal steering diode between RESET and VDD pins

• 8 × 8 unsigned multiply instruction

• 20-pin plastic dual in-line package (PDIP)

• 20-pin small outline integrated circuit package (SOIC)