MC68HC705E5DW中文资料General Release Specification数据手册恩XP规格书

描述 Description

General Description
Introduction
The MC68HC705E5 is a low-cost introduction to the M68HC05 Family of microcontrollers (MCUs). The HC05 central processing unit (CPU) core has been enhanced with a 15-stage multifunctional timer and programmable phase-locked loop (PLL). The MCU is available in a 28-pin package and has two 8-bit input/output (I/O) ports and one 4-bit I/O port. The 8-Kbyte memory map consists of user eraseable, programmable read-only memory (EPROM), random-access memory (RAM), bootloader ROM, and I/O.

特性 Features

Features of the MC68HC705E5 include:
• Low Cost
• HC05 Core
• 28-Pin Package
• On-Chip Oscillator (Crystal or Ceramic Resonator)
• Phase-Locked Loop (PLL) Synthesizer with Programmable Speed
• Synchronous Serial Interface (SSI) with Interrupts and Most Significant Bit (MSB) or Least Significant Bit (LSB) First
• M-Bus (I2C) Communication Port
• 5120 Bytes of User EPROM (Including 16 Bytes of EPROM User Vectors)
• 384 Bytes of On-Chip RAM
• 15-Stage Multifunctional Timer with Programmable Input
• Real-Time Interrupt Circuit
• Computer Operating Properly (COP) Watchdog Timer Mask Option
• Custom Periodic Interrupt Circuit
• 20 Bidirectional I/O Lines
• Single-Chip Mode
• Bootloader Mode
• Power-Saving Stop and Wait Modes
• Edge-Only Sensitive or Edge- and Level-Sensitive Interrupt Trigger Mask Option
• STOP Instruction Disable Mask Option
• System Control and Status Register
• Illegal Address Reset