MC68HC11EA9数据手册恩XP中文资料规格书

描述 Description

Overview The 68HC11E family MCUs all combine the M68HC11 CPU with high-performance, on-chip peripherals. The E series is comprised of many devices with various configurations of RAM, ROM or EPROM, and EEPROM. Several low-voltage devices are also available. With the exception of a few minor differences, the operation of all E-series MCUs is identical. A fully static design and high-density complementary metal-oxide semiconductor (HCMOS) fabrication process allow E-series devices to operate at frequencies from 3 MHz to dc.
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特性 Features

Fully static design featuring the M68HC11 Family CPU core with 2.1 MHz bus frequency



•Single-chip, expanded and bootstrap modes of operation


•64K addressing capability in expanded mode


•Power-saving phase-lock-loop (PLL) clock circuit with software selectable voltage-controlled oscillator


•Low-noise power supply and external filter capacitor can be connected using VDDSYN and XFC iuput pins, thus minimizing distortion of the voltage-controlled oscillator


•E-clock output with software disable


•12K bytes of mask-programmable ROM or 12K bytes of EPROM


•512 bytes of EEPROM with block protection for enhanced security


•512 bytes of RAM


•Power saving STOP and WAIT modes