MC68HC05K3中文资料恩XP数据手册PDF规格书

Features

• Low-cost HC05 core

• 16-pin PDIP, 16-pin SOIC package, or 20-pin SSOP

• 928 bytes of user ROM, including eight bytes of user vectors

• 64 bytes of user RAM

• Low-power operation at 1.8 V — VDD minimum (EEPROM read

only)

• 128 bits of personality EEPROM (not memory mapped)

programmed using CPU software or with on-chip serial

programming ROM

• On-chip charge pump for in-circuit programming of the personality

EEPROM at 2.7 to 5.5 Vdc

• 8-bit free-running timer

• 4-stage selectable real-time interrupt generator

• 10 bidirectional input/output (I/O) lines including:

– 8-mA sink capability on four I/O pins (PA7–PA4)

– Mask option for software programmable pulldowns on all I/O

pins

– Mask option for port interrupts on four I/O pins (PA3–PA0)

(keyboard scan feature)

• IRQ interrupt hardware mask, flag bit, and request bit

• Mask option for sensitivity on IRQ interrupt (edge- and

level-sensitive or edge-sensitive only)

• On-chip oscillator (mask options for crystal/ceramic resonator

oscillator with internal 2-MW resistor and 2-pin or 3-pin resistor

capacitor (RC) oscillator)

• Mask option for reduced startup delay time with RC oscillator

options

• Mask option for computer operating properly (COP) watchdog

system

• Power-saving stop mode and wait mode instructions

• Mask option to convert STOP instruction to halt mode

• Illegal address reset

• Internal steering diode and pullup resistor on RESET pin to VDD

• Internal RESET pin pulldown from COP watchdog and ILADR