MC68882数据手册恩XP中文资料规格书

描述 Description

Overview The MC68882 floating-point coprocessor (FPCP) fully implements the IEEE Standard for BinaryFloating-Point Arithmetic (ANSI-IEEE Std 754-1985) for use with the NXP® M68000 Familyof microprocessors.The MC68882 provides an increased level of performance in a coprocessorthat is fully compatible and physically interchangeable with the MC68881.
Intended primarily for use as a coprocessor to the MC68020/MC68030 32-bit microprocessor,theMC68882 provides a logical extension to the main processing unit integer data processingcapabilities. This coprocessor provides a very high performance floating-point arithmetic unitand a set of floating-point data registers utilized in a manner that is analogous to the use of theinteger data registers. The MC68882 instruction set, a natural extension of all earlier membersof theM68000 Family, supports all of the addressing modes of the host MPU.
Archived content is no longer updated and is made available for historical reference only.

特性 Features

•8 general-purpose floating-point data registers, each supporting a full 80-bit extended precision real data format (a 64-bit mantissa plus a sign bit, and a 15-bit signed exponent).
•67-bit arithmetic unit to allow very fast calculations, with intermediate precision greater than the extended precision format.
•67-bit barrel shifter for high-speed shifting operations (for normalizing, etc.).
•46 instructions, including 35 arithmetic operations.
•Full conformance to the ANSI-IEEE 754-1985 standard, including all requirements and suggestions.
•Support of functions not defined by the IEEE standard, including a full set of trigonometric and transcendental functions.
•7 data formats: byte, word, and long word integers; single, double, and extended precision real numbers; and packed binary coded decimal string real numbers.
•22 constants available in the on-chip ROM
•Virtual memory/machine operations.
•Efficient mechanisms for exception processing, context switches, and interrupt handling.
•Fully concurrent instruction execution with the main processor.
•Use with any host processor, on an 8-, 16-, or 32-bit data bus.
•Concurrent execution of multiple floating-point instructions.
•Special-purpose hardware for high-speed conversion of binary real memory operands to/from the internal extended format.
•Simultaneous access to the floating-point registers by the MC68882's conversion and arithmetic processing units.
•Reduced coprocessor interface overhead to increase throughput.