MC56F84769VLL中文资料恩XP数据手册PDF规格书

特性 Features

• This family of digital signal controllers (DSCs) is

based on the 32-bit 56800EX core. Each device

combines, on a single chip, the processing power of a

DSP and the functionality of an MCU with a flexible

set of peripherals to support many target applications:

– Industrial control

– Home appliances

– Smart sensors

– Fire and security systems

– Switched-mode power supply and power

management

– Uninterruptible Power Supply (UPS)

– Solar and wind power generator

– Power metering

– Motor control (ACIM, BLDC, PMSM, SR, stepper)

– Handheld power tools

– Circuit breaker

– Medical device/equipment

– Instrumentation

– Lighting

• DSC based on 32-bit 56800EX core

– Up to 100 MIPS at 100 MHz core frequency

– DSP and MCU functionality in a unified, C-efficient

architecture

• On-chip memory

– Up to 288 KB (256 KB + 32 KB) flash memory,

including up to 32 KB FlexNVM

– Up to 32 KB RAM

– Up to 2 KB FlexRAM with EEE capability

– 100 MHz program execution from both internal

flash memory and RAM

– On-chip flash memory and RAM can be mapped

into both program and data memory spaces

• Analog

– Two high-speed, 8-channel, 12-bit ADCs with

dynamic x2, x4 programmable amplifier

– One 20-channel, 16-bit ADC

– Four analog comparators with integrated 6-bit DAC

references

– One 12-bit DAC

• PWMs and timers

– Two eFlexPWM modules with up to 24 PWM

outputs, one including 8 channels with high

resolution NanoEdge placement

– Two 16-bit quad timer (2 x 4 16-bit timers)

– Two Periodic Interval Timers (PITs)

– One Quadrature Decoder

– Two Programmable Delay Blocks (PDBs)

• Communication interfaces

– Three high-speed queued SCI (QSCI) modules with

LIN slave functionality

– Up to three queued SPI (QSPI) modules

– Two SMBus-compatible I2C ports

– One flexible controller area network (FlexCAN)

module

• Security and integrity

– Cyclic Redundancy Check (CRC) generator

– Computer operating properly (COP) watchdog

– External Watchdog Monitor (EWM)

• Clocks

– Two on-chip relaxation oscillators: 8 MHz (400 kHz

at standby mode) and 32 kHz

– Crystal / resonator oscillator

• System

– DMA controller

– Integrated power-on reset (POR) and low-voltage

interrupt (LVI) and brown-out reset module

– Inter-module crossbar connection

– JTAG/enhanced on-chip emulation (EOnCE) for

unobtrusive, real-time debugging

• Operating characteristics

– Single supply: 3.0 V to 3.6 V

– 5 V–tolerant I/O (except RESETB pin)

• LQFP packages:

– 64-pin

– 80-pin

– 100-pin