MC56F8323中文资料飞思卡尔数据手册PDF规格书

General Description

Note: Features in italics are NOT available in the 56F8123 device.

• Up to 60 MIPS at 60MHz core frequency

• DSP and MCU functionality in a unified, C-efficient architecture

• 32KB Program Flash

• 4KB Program RAM

• 8KB Data Flash

• 8KB Data RAM

• 8KB Boot Flash

• One 6-channel PWM module

• Two 4-channel 12-bit ADCs

• Temperature Sensor

• One Quadrature Decoder

• One FlexCAN module

• Up to two Serial Communication Interfaces (SCIs)

• Up to two Serial Peripheral Interfaces (SPIs)

• Two general-purpose Quad Timers

• Computer Operating Properly (COP)/Watchdog

• On-Chip Relaxation Oscillator

• JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging

• Up to 27 GPIO lines

• 64-pin LQFP Package