MC54HC154中文资料\u0018\u001D\u0017\u001C\u0016\u001A\u00171-OF-16 DECODER/DEMULTIPLEXER HIGH-PERFORMANCE SILICON-GATE CMOS数据手册恩XP规格书

描述 Description

\u0015\u0002\u0004\u0007 \u0018\u001D\u0017\u001C\u0016\u001A\u0017\u0014\u001E\u0014\u001B\u0018\u001D\u0017\u001C\u0016\u001A\u00171-OF-16 DECODER/DEMULTIPLEXER High–Performance Silicon–Gate CMOSThe MC54/74HC154 is identical in pinout tothe LS154. The device inputs arecompatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device, when enabled, selects one of 16 active–low outputs. Two active–lowChip Selects are provided to facilitate the chip–select, demultiplexing,and cascading functions. When either Chip Select is high, all outputsare high. The demultiplexing function is accomplished by using the
Address inputs to select the desired device output. Then, while holding one chip select input low, data can be applied to the other chip select input (see Application Note).
TheHC154 is primarily used for memory address decoding and data routing applications.

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 192 FETs or 48 Equivalent Gates