MC145191中文资料恩XP数据手册PDF规格书

The MC145191 is a single–package synthesizer with serial interface capable

of direct usage up to 1.1 GHz. A special architecture makes this PLL very easy

to program because a byte–oriented format is utilized. Due to the patented

BitGrabber registers, no address/steering bits are required for random access

of the three registers. Thus, tuning can be accomplished via a 3–byte serial

transfer to the 24–bit A register. The interface is both SPI and MICROWIRE

compatible.

The device features a single–ended current source/sink phase detector

output and a double–ended phase detector output. Both phase detectors have

linear transfer functions (no dead zones). The maximum current of the

single–ended phase detector output is determined by an external resistor tied

from the Rx pin to ground. This current can be varied via the serial port.

The MC145191 has phase/frequency detectors optimized for single–supply systems of 5 V ±10%.

The part includes a differential RF input which may be operated in a

single–ended mode. Also featured are on–board support of an external crystal

and a programmable reference output. The R, A, and N counters are fully

programmable. The C register (configuration register) allows the part to be

configured to meet various applications. A patented feature allows the C

register to shut off unused outputs, thereby minimizing system noise and

interference.

In order to have consistent lock times and prevent erroneous data from being

loaded into the counters, on–board circuitry synchronizes the update of the A

register if the A or N counters are loading. Similarly, an update of the R register

is synchronized if the R counter is loading.

The double–buffered R register allows new divide ratios to be presented to

the three counters (R, A, and N) simultaneously.

• Maximum Operating Frequency: 1100 MHz @ Vin = 200 mV p–p

• Operating Supply Current: 7 mA Nominal

• Operating Supply Voltage Range (VDD and VCC Pins): 4.5 to 5.5 V

• Operating Supply Voltage Range of Phase Detectors (VPD Pin):

4.5 to 5.5 V

• Current Source/Sink Phase Detector OUTPUT Capability: 2 mA Maximum

• Gain of Current Source/Sink Phase/Frequency Detector Controllable via

Serial Port

• Operating Temperature Range: – 40 to + 85°C

• R Counter Division Range: (1 and) 5 to 8191

• Dual–Modulus Capability Provides Total Division up to 262,143

• High–Speed Serial Interface: 4 Mbps

• OUTPUT A Pin, When Configured as Data Out, Permits Cascading of Devices

• Two General–Purpose Digital Outputs — OUTPUT A: Totem–Pole (Push–Pull)

OUTPUT B: Open–Drain

• Patented Power–Saving Standby Feature with Orderly Recovery for

Minimizing Lock Times, Standby Current: 30 µA

• Evaluation Kit Available (Part Number MC145191EVK)

• See Application Note AN1253/D for Low–Pass Filter Design, and

AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping