MC145151DW2集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

The devices described in this document are typically used as low-power, phase-locked loop frequency synthesizers. When combined with an external low-pass filter and voltage-controlled oscillator, these devices can provide all the remaining functions for a PLL frequency synthesizer operating up to the devices frequency limit. For higher VCO frequency operation, a down mixer or a prescaler can be used between the VCO and the synthesizer IC.

These frequency synthesizer chips can be found in the following and other applications:

CATV TV Tuning

AM/FM Radios Scanning Receivers

Two-Way Radios Amateur Radio

Features

• Operating Temperature Range: - 40 to 85°C

• Low Power Consumption Through Use of CMOS Technology

• 3.0 to 9.0 V Supply Range

• On- or Off-Chip Reference Oscillator Operation

• Lock Detect Signal

• ÷ N Counter Output Available

• Single Modulus/Parallel Programming

• 8 User-Selectable ÷ R Values: 8, 128, 256, 512, 1024, 2048, 2410, 8192

• ÷ N Range = 3 to 16383

• “Linearized” Digital Phase Detector Enhances Transfer Function Linearity

• Two Error Signal Options: Single-Ended (Three-State) or Double-Ended

• Chip Complexity: 8000 FETs or 2000 Equivalent Gates