MC14490P集成电路（IC）的专用逻辑器件规格书PDF中文资料

MC14490P属于集成电路（IC）的专用逻辑器件。由安森美半导体制造生产的MC14490P专用逻辑器件专用逻辑 IC 设计提供应用特定的逻辑输出类型，例如 BCD 速率倍增、可寻址扫描端口、总线终端阵列、CML 驱动器、比较器、ABT 扫描测试、二进制全加法器、互补对加逆变器、可配置缓冲器、触点颤动消除器、晶体振荡器、延迟元件、差分接收器、LVTTL 到 GTLP 收发器、存储器解码器、电源良好检测器和分频器。

The MC14490 is constructed with complementary MOS enhancement mode devices, and is used for the elimination of extraneous level changes that result when interfacing with mechanical contacts. The digital contact bounce eliminator circuit takes an input signal from a bouncing contact and generates a clean digital signal four clock periods after the input has stabilized. The bounce eliminator circuit will remove bounce on both the “make” and the “break” of a contact closure. The clock for operation of the MC14490 is derived from an internal R–C oscillator which requires only an external capacitor to adjust for the desired operating frequency (bounce delay). The clock may also be driven from an external clock source or the oscillator of another MC14490 (see Figure 5).

• Diode Protection on All Inputs

• Six Debouncers Per Package

• Internal Pullups on All Data Inputs

• Can Be Used as a Digital Integrator, System Synchronizer, or Delay

Line

• Internal Oscillator (R–C), or External Clock Source

• TTL Compatible Data Inputs/Outputs

• Single Line Input, Debounces Both “Make” and “Break” Contacts

• Does Not Require “Form C” (Single Pole Double Throw) Input

Signal

• Cascadable for Longer Time Delays

• Schmitt Trigger on Clock Input (Pin 7)

• Supply Voltage Range = 3.0 V to 18 V

• Chip Complexity: 546 FETs or 136.5 Equivalent Gates