MC14043B数据手册集成电路（IC）的锁存器规格书PDF

描述 Description

The MC14043B and MC14044B quad R-S latches are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical \"1\" or high on the enable input; a logical \"0\" or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs.

特性 Features

• Double Diode Input Protection
• Three-State Outputs with Common Enable
• Outputs Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Pb-Free Packages are Available*

简介

MC14043B属于集成电路（IC）的锁存器。由制造生产的MC14043B锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。