MC14018B中文资料预设 N 分频计数器数据手册ONSEMI规格书

描述 Description

The MC14018B contains five Johnson counter stages which are asynchronously presettable and resettable. The counters are synchronous, and increment on the positive going edge of the clock. Presetting is accomplished by a logic 1 on the preset enable input. Data on the Jam inputs will then be transferred to their respective Qbar outputs (inverted). A logic 1 on the reset input will cause all Qbar outputs to go to a logic 1 state. Division by any number from 2 to 10 can be accomplished by connecting appropriate Qbar outputs to the data input, as shown in the Function Selection table. Anti-lock gating is included in the MC14018B to assure proper counting sequence.

特性 Features

• Fully Static Operation
• Schmitt Trigger on Clock Input
• Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
• Pin-for-Pin Replacement for CD4018B
• Pb-Free Packages are Available*

简介

MC14018B属于集成电路（IC）的计数器除法器。由制造生产的MC14018B计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。