MC12009数据手册恩XP中文资料规格书

描述 Description

Dual Modulus Prescaler
\b\u0013 \u000F  \u0010
\u0013\u000F\u0013\u0012These devices are two–modulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. A MECL–to–MTTL translator is provided to interface directly with the MC12014 Counter Control Logic. In addition, there is a buffered clock input and MECL bias voltage source.•MC12009 480 MHz (\u00015/6), MC12011 550 MHz (\u00018/9), MC12013 550 MHz (\u000110/11)
•MECL to MTTL Translator on Chip
•MECL and MTTL Enable Inputs
•5.0 or –5.2 V Operation*
•Buffered Clock Input — Series Input RC Typ, 20 Ohms and 4 pF
•VBBReference Voltage
•310 Milliwatts (Typ)