MC10LVEL40DWR2G中文资料安森美半导体数据手册PDF规格书

描述 Description

The MC100LVEL40 is a three state phase frequency−detector intended for phase−locked loop applications which require a minimum amount of phase and frequency difference at lock. Advanced design significantly reduces the dead zone of the detector. For proper operation, the input edge rate of the R and V inputs should be less than 5 ns. The device is designed to work with a 3.3 V power supply.

特性 Features

• 250 MHz Typical Bandwidth

• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V

• Internal Input Pulldown Resistor

• Pb−Free Packages are Available*