MC10EP31DR2集成电路（IC）的触发器规格书PDF中文资料

MC10EP31DR2属于集成电路（IC）的触发器。由安森美半导体公司制造生产的MC10EP31DR2触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。

Description

The MC10/100EP31 is a D flip−flop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster than the EL31 and LVEL31 devices, the EP31 is ideal for applications requiring the fastest AC performance available. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flip−flop when CLK is low and is transferred to the slave, and thus the outputs, upon a positive transition of the CLK.

Features

The 100 Series contains temperature compensation.

•340 ps Typical Propagation Delay

•Maximum Frequency > 3 GHz Typical

•PECL Mode Operating Range:

VCC= 3.0 V to 5.5 V with VEE= 0 V

•NECL Mode Operating Range:

VCC= 0 V with VEE= −3.0 V to −5.5 V

•Open Input Default State

•Q Output Will Default LOW with Inputs Open or at VEE

•Pb−Free Packages are Available