MC10EL33

첨4 Divider

Description TheMC10EL/100EL33isanintegrated÷4divider.ThedifferentialclockinputsandtheVBBallowadifferential,single-endedorACcoupledinterfacetothedevice.TheVBBpin,aninternallygeneratedvoltagesupply,isavailabletothisdeviceonly.Forsingle-endedinputconditions,

MC10EL33

5.0 V ECL ÷·4 Divider; • 650ps Propagation Delay\n• 4.0GHz Toggle Frequency\n• ESD Protection: > 1 KV HBM, > 100 V MM\n• PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V\n• NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V\n• Internal Input Pulldown Resistors on CLK(s) and R.\n• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test\n• Moisture Sensitivity Level 1For Additional Information, see Application Note AND8003/D\n• Flammability Rating: UL-94 code V-0 @ 1/8\", Oxygen Index 28 to 34\n• Transistor Count = 95 devices\n• Pb-Free Packages are Available\n;

The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.015F capacitor. Also note that the VBB is designed to be used as an input bias on the EL33 only, the VBB output has limited current sink and source capability. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EL33's in a system.The 100 Series contains temperature compensation.

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