High Speed Dual Type D Master-Slave Flip-Flop

The MC10231 is a dual master–slave type D flip–flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking function. If the common clock

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ONSEMI

安森美半导体

High Speed Dual Type D Master-Slave Flip-Flop

文件：113.18 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

High Speed Dual Type D Master-Slave Flip-Flop

文件：113.18 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

High Speed Dual Type D Master-Slave Flip-Flop

文件：113.18 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

High Speed Dual Type D Master-Slave Flip-Flop

文件：113.18 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

High Speed Dual Type D Master-Slave Flip-Flop

文件：113.18 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

High speed dual type D master-slave flip-flop

The MC10231 is a dual master–slave type D flip–flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking function. If the common clock i

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High Speed Dual Type D Master-Slave Flip-Flop

ONSEMI

安森美半导体