12-Bit parity Generator-Checker

The MC10160 consists of nine Exclusive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of inputs are high. Unconnected inputs are pulled to low logic levels allowing parity detection and generation for less than 1

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Binary to 1-8 Decoder(Low)

The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output will be low while all other outputs will be high. The enable inputs, when either or both are high, force all outputs high. The MC10161 is a true parallel decoder. No series gating is used i

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Binary to 1-8 Decoder (High)

Binary to 1-8 Decoder (High) The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low. The MC10162 is a true parallel decoder. No

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Binary to 1-8 Decoder (High)

Binary to 1-8 Decoder (High) The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low. The MC10162 is a true parallel decoder. No

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Binary to 1-8 Decoder (High)

Binary to 1-8 Decoder (High) The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low. The MC10162 is a true parallel decoder. No

文件：91.36 Kbytes 页数：4 Pages

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Binary to 1-8 Decoder (High)

Binary to 1-8 Decoder (High) The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low. The MC10162 is a true parallel decoder. No

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8-Line Multiplexer

The MC10164 is a high speed, low power eight–channel data selector which routes data present at one–of–eight inputs to the output. The data is routed according to the three bit code present on the address inputs. An enable input is provided for easy bit expansion. • PD = 310 mW typ/pkg (No Load)

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8-Input Priority Encoder

The MC10165 is a device designed to encode eight inputs to a binary coded output. The output code is that of the highest order input. Any input of lower priority is ignored. Each output incorporates a latch allowing synchronous operation. When the clock is low the outputs follow the inputs and lat

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Quad Latch

Quad Latch The MC10168 is a Quad Latch with common clocking to all four latches. Separate output enabling gates are provided for each latch, allowing direct wiring to a bus. When the clock is high, outputs will follow the D inputs. Information is latched on the negative–going transition of the cl

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Binary to 1-8 Decoder (Low)

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