MC100ES6254中文资料瑞萨数据手册PDF规格书

特性 Features

• Fully differential architecture from input to all outputs

• SiGe technology supports near-zero output skew

• Supports DC to 3GHz operation(1) of clock or data signals

• LVPECL compatible differential clock inputs and outputs

• LVCMOS compatible control inputs

• Single 3.3 V or 2.5 V supply

• 50 ps maximum device skew(1)

• Synchronous output enable eliminating output runt pulse generation and

metastability

• Standard 32 lead LQFP package

• Industrial temperature range

• 32-lead Pb-free package