MC100EP17DWR2集成电路（IC）的专用逻辑器件规格书PDF中文资料

MC100EP17DWR2属于集成电路（IC）的专用逻辑器件。由安森美半导体公司制造生产的MC100EP17DWR2专用逻辑器件专用逻辑 IC 设计提供应用特定的逻辑输出类型，例如 BCD 速率倍增、可寻址扫描端口、总线终端阵列、CML 驱动器、比较器、ABT 扫描测试、二进制全加法器、互补对加逆变器、可配置缓冲器、触点颤动消除器、晶体振荡器、延迟元件、差分接收器、LVTTL 到 GTLP 收发器、存储器解码器、电源良好检测器和分频器。

3.3V / 5V ECL Quad Differential Driver/Receiver

Description

The MC10/100EP17 is a 4-bit differential line receiver based on the EP17 device. The >3.0 GHz maximum frequency provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage.

Features

• 220 ps Typical Propagation Delay

• Maximum Frequency >3.0 GHz Typical

• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V

• Open Input Default State

• Safety Clamp on Inputs

• Q Output Will Default LOW with Inputs Open or at VEE

• VBB Output

• Pb−Free Packages are Available*