4-BIT D FLIP-FLOP

Description The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE inputs LOW and using CC to

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5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 页数：8 Pages

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ECL 4-Bit D Flip-Flop

The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CEbar) inputs for clocking. Common clocking is achieved by holding the CEbar inputs LOW and using CC to clock all • 1100MHz Min. Toggle Frequency\n• Differential Outputs\n• Individual and Common Clocks\n• Individual Resets (asynchronous)\n• Paired Sets (asynchronous)\n• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V\n• 75kW Input Pulldown Resistors\n• NECL Mode Operating Range: VCC = 0 V with VE;

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安森美半导体

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 页数：8 Pages

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安森美半导体

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 页数：8 Pages

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安森美半导体

5V ECL 4?륛it D Flip?륡lop

文件：161 Kbytes 页数：8 Pages

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安森美半导体

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

5V ECL 4?륛it D Flip?륡lop

文件：161 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

5V ECL 4-Bit D Flip-Flop

文件：129.8 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Package：28-LCC（J 形引线）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 4BIT 28PLCC

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安森美半导体