Description

The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock driver, although the MC10E/100E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the E212 device.

The 100 Series contains temperature compensation.

Features

• 600 ps Max. Propagation Delay

• Common Enable Input

• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V

• Internal Input 50 k Pulldown Resistors

• ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34

• Transistor Count = 125 devices

• Pb−Free Packages are Available*

MC100E112属于集成电路（IC） > 门和反相器 - 多功能，可配置。安森美半导体公司制造生产的MC100E112门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。